Technical Field
The embodiments herein is related to apparatuses/systems for designing Integrated Circuits (IC). The embodiments herein is particularly related to apparatuses/systems for designing IC such as system on chip (SoC). The embodiments herein is more particularly related to a system and method for designing system on chip (SoC) using artificial intelligence (AI) and reinforcement learning techniques.
Description of Related Art
System on Chip (SOC) is an integrated circuit (IC) that integrates all the components of an electrical/electronic system into a single chip. The integrated circuit typically comprises digital functions, analog functions, mixed-signal functions and radio-frequency functions inter-alia embedded onto a single chip substrate. The integrated circuit typically includes hardware (for example, microprocessors, and microcontrollers) and also the software necessary for controlling the functionalities and implementation of the hardware.
Typically, SoCs are developed from pre-qualified hardware blocks corresponding to the hardware elements to be included there into, and along with the software drivers that control the functionalities of the said hardware elements. Typically, the hardware elements are assembled using well known Computer Aided Design (CAD) tools, and the corresponding software modules are integrated using an integrated software development environment, subsequent to the finalization of SoC circuit architecture.
The design flow for typical SoC circuits are fragmented and implemented manually. Further, the process of converting a design flow (of a SoC circuit) into a physical design is not free from (design related) errors due to a manual implementation and fragmented nature (of the corresponding design flow). Typically, functional verification (for determining whether the logic design of the SoC circuit confirms to the design specification), which forms a critical part of the transformation from design flow (of a SoC circuit) to physical design, demands the largest pool of resources (in terms of time, manpower inter-alia), due to the complexity of the SoC circuit design as well as the enormity of possible test cases/test scenarios necessary to completely verify the SoC circuit design in its entirety. Typically, the design phase of a SoC circuit involves use of a plurality of discrete tools along with the use of multiple formats and implementation procedures.
Current SoC design process includes the steps of receiving a system specification, architectural design, functional and logic design, circuit design, physical design, physical verification, and fabrication of chip. Further, each process generates data that are highly correlated. At present, there is no system and method available and exist for generalization and learnability of data generated in chip designing process.
The existing process of SoC chip design does not teach about implementing an AI framework into the manual chip design process. AI framework helps in automating the process of chip design, thereby making the design process quick, speedy and efficient. Further, the AI framework helps in learning the data generated during the chip design process.
Hence, there is a need for improving quality of design and time consumed for achieving SoC design circuits, apart from mitigating the risks associated with SoC circuit design process and rendering the (SoC circuit) design process cost effective. Further, there is a need for automating the process of SoC design for improving efficiency due to the complexities associated with the design and implementation of SoC circuits, and the utilization of multiple discrete tools and multiple design formats. Furthermore, there exists a need for a system for learnability, inferencing and prediction from current SoC design for use in future SoC designs.
The abovementioned shortcomings, disadvantages and problems are addressed herein, which will be understood by reading and studying the following specification.